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Freescale Semiconductor /MK61F15WS /DDR /CR25

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Interpret as CR25

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (0)BNK8 0RESERVED0ADDPINS 0RESERVED0COLSIZ 0RESERVED0APREBIT0RESERVED

BNK8=0

Description

DDR Control Register 25

Fields

BNK8

Eight Bank Mode

0 (0): 4 banks

1 (1): 8 banks
RESERVED

Reserved
ADDPINS

Address Pins
RESERVED

Reserved
COLSIZ

Column Size
RESERVED

Reserved
APREBIT

Auto Precharge Bit
RESERVED

Reserved

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data